Ambarella, a developer of low-power, HD and Ultra HD video processing semiconductors, introduced the S5 System-on-Chip (SoC) targeting professional high-quality 4K and multi-imager IP camera designs.
Ambarella, a developer of low-power, HD and Ultra HD video processing semiconductors, introduced the S5 System-on-Chip (SoC) targeting professional high-quality 4K and multi-imager IP camera designs. The S5 offers advanced features including 4K multi-exposure High Dynamic Range (HDR) fusion, 360° de-warp and ultra-low light processing. Maximum performance is 4Kp120 or 8Kp30 of H.264/AVC and 4Kp60 frames of H.265/HEVC, while supporting flexible multi-streaming, rate control and transcoding functions. The S5 supports the high-quality Main10 HEVC Profile (10-bit H.265) for outstanding representation of high contrast scenes and a wide color gamut. In addition, it leverages Ambarella’s SmartHEVC™ technology to radically reduce 4Kp30 video bitrates to between 512 Kbps and 4 Mbps, minimizing network bandwidth requirements and saving on storage costs. The S5 image sensor interface and its advanced 1-Gigapixel/s Image Sensor Pipeline (ISP) can be configured as up to four independent sensor inputs to allow development of high resolution multi-imager cameras.
“The S5 will play a critical role in the industry’s shift to 4K and H.265. With it, our partners gain a leading-edge image processor that delivers low power consumption, superior image quality, smart H.265 compression and a powerful quad-core CPU.”
Fermi Wang, President and CEO, Ambarella
The S5 includes a 1.2 GHz quad-core ARM Cortex-A53 64-bit CPU with floating point and NEONTM available for user applications. A Linux-based Software Development Kit (SDK) allows customers to develop highly differentiated products including 4Kp60 traffic cameras, 4x4K multi-imagers and surround view cameras, with support for advanced features including intelligent video analytics, in-camera edge storage and transcoding.
S5 Feature Summary:
- H.265/HEVC Main/Main10 Profile Level 5.1 encoding up to 4Kp60 with SmartHEVC low-bitrate streaming
- H.264/AVC Baseline/Main/High Profile Level 5.1 encoding up to 4Kp120 or 8Kp30
- Multi-streaming with on-the-fly settings for resolution, frame rate, quality and transcode
- Sub-LVDS/SLVS-EC/MIPI/HiSPi sensor interfaces configurable as up to 4 independent interfaces
- ISP with line-interleaved multi-exposure HDR MCTF 3D noise reduction, High ISO low-light, defog and contrast enhancement
- Multi-imager support for up to four 4K sensors with stabilization, de-warp and image stitching
- 180/360° de-warping with multiple windows, electronic PTZ and rotation
- 1.2 GHz quad-core ARM Cortex-A53 CPU with floating point, NEON SIMD
- Ambarella low-power architecture combined with 14nm FinFET technology enables 4Kp30 encoding, including DDR, at less than 1.4 Watts
Product Adopted:Image Processors