ADSP-2192:16-bit Fixed-Point DSP For Multichannel Applications

The ADSP-2192 is a dual-core 16-bit fixed-point DSP optimized for multichannel voice/data and other high-speed numeric processing applications. It is the first product available based on ADI's new high performance ADSP-219x digital signal processor (DSP) core capable of 320 million instructions per second (MIPS). Future products on the ADSP-219x roadmap will follow two paths, one addressing high-performance requirements delivering up to 1200 MIPS and another addressing low power requirements needing less than 0.1 mW/MIPS.


It is the first product available based on ADI's new high-performance ADSP-219x digital signal processor (DSP) core capable of 320 million instructions per second (MIPS).
Building off its full code-compatibility with the entire ADSP-218x DSP family, the DSP cores used in the ADSP-2192 utilize the ADSP-2100 family base architecture consisting of three computational units, data address generators, and a program sequencer. The ADSP-2192 will also support a wide range of interfaces including: Peripheral Component Interconnect (PCI) with CardBus and Sub-ISA interface mode for embedded applications and Universal Serial Bus (USB) with interface to serial EPROM devices, AC'97 and DMA. Other ADSP-2192 highlights include a programmable timer for each core, extensive interrupt capabilities along with on-chip program and data memory.


With 132K words of on-chip memory, the ADSP-2192's first core processor (P0) is configured with 64K x 16-bit Data Memory, 16K x 24-bit Program Memory, and Boot ROM. The second core processor (P1) is configured with 32K x 16-bit Data Memory, 16K x 24-bit Program Memory, and Boot ROM. The ADSP-2192 also features 4K x 16-bit words of shared memory that will reduce external data accesses allowing a higher sustained processor performance.


Power-down circuitry is provided to meet the low-power needs of battery-operated portable equipment. The ADSP-2192 is available in a 144-pin LQFP package.
Fabricated in a high-speed, low-power, CMOS process, the ADSP-2192 operates with a 6.25-ns instruction cycle time (160MHz/320MIPS). The ADSP-2192's dual-core architecture and comprehensive instruction set enable the processors to perform multiple operations in parallel, and any two instructions can execute in a single DSP processor cycle.


*160MHz/320MIPS High-performance dual-core 16-bit device
*Code-compatible with popular ADSP-218x family
*2.4 Mbits on-chip SRAM; On-chip boot ROM
*PCI 2.2 33MHz/32-bit compliant interface; Integrated USB 1.1-compliant interface
* Fourteen DMA channels
*Serial interface for external EPROM/EEPROM Devices

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