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Ambarella executives on new chips for agentic AI workloads in exclusive ISC West interview
Ambarella executives on new chips for agentic AI workloads in exclusive ISC West interview
At ISC West, the fabless semiconductor designer demonstrated its latest generation of systems-on-chip (SoCs) for transformer-based workloads: The CV7 edge AI vision family of SoCs and the N1 edge GenAI family of SoCs.

Ambarella executives on new chips for agentic AI workloads in exclusive ISC West interview

Date: 2026/03/30
Source: Editorial Dept.
US-based semiconductor company Ambarella is one of the hidden champions of the security industry. Its name cannot be found on any security camera casings, but its chips, of which it has shipped a cumulative 400 million, including 42 million AI SoCs, power edge devices by major security camera makers from i-PRO to Axis and Bosch (IQSIGHT), but also global names outside the security sector, such as Insta360 and GoPro.
 
At ISC West, the fabless semiconductor designer demonstrated its latest generation of systems-on-chip (SoCs) for transformer-based workloads: The CV7 edge AI vision family of SoCs and the N1 edge GenAI family of SoCs.
 
Ambarella’s over 20 demos, showcased in an invitation-only suite aside from the show floor, had three highlights for those interested in security systems integration. They were:
  • AI-powered ISP (image signal processing), also called AISP, for real-time image quality enhancement
  • Coding-free system setup powered by agentic AI
  • Concurrent AI workloads including ISP, AI agents, and metadata generation and analysis
 
While the CV7 and N1 empower advances in all three areas, agentic AI likely represents the most plain-to-see innovation, setting apart previous systems from those running on the latest AI chips.
 

Agentic AI and scalability

“The moment when users become aware of how far AI capabilities have advanced is when they see agentic AI in action,” said Jérôme Gigot, VP of Marketing Edge AI Products, Ambarella. “We show this in one of our demos, where we demonstrate how to set up a warehouse monitoring system. The whole process is based on prompts—no coding is needed—to set up a system involving edge AI cameras running on CV7s and on-prem AI boxes running on N1s, as well as analytics in the cloud.”
 
“The result is a context-aware system that monitors the premises, gives users summaries of what’s happening, and automatic, AI-powered responses,” he explained. “No coding is needed to set up such a system; operators can simply give prompts, and the AI agent designs the whole architecture.”
 
With the demos, Ambarella also sought to give its expert audience an impression of full breadth of AI performance of its chips.
 
“The real test is when you run a whole system with multiple AI operations simultaneously,” Gigot said. “This means multiple 4K video streams, including processing and encoding image data, and running multiple AI agents and models feeding on metadata generated at the edge. One of our key demonstrations shows the AI inference rate remaining constant at 80 to 82fps, even when adding extra strain on the system with 4K ISP processing, 4K encoding, and full CPU loading.”
 

Cutting-edge efficiency

Ambarella demonstrates 64 channel multi stream decoding
at ISC West 2026. Powered by its ultra-low power N1 Edge GenAI SoC,
the demo shows how AI boxes can efficiently process up to 64 camera
feed in real time. (Source: Ambarella)
The demos highlighted one of Ambarella’s core strengths: High-performance chips with cutting-edge energy efficiency.
 
Gigot said efficiency is key to operating modern security systems, such as the warehouse system in the demo. With the latest Ambarella chips, natural-language prompts, enabling the analysis of past events and alarm setup for future events, no longer require the compute power-heavy analysis of past footage, thanks to transformers-based models.
 
“With transformers, this is becoming an efficient vector-match operation, solely based on AI metadata written when the footage was captured,” Gigot added. “Transformers increase AI performance 10 to 20-fold. With our latest-generation chips, which are built on 4 nanometer nodes, down from 5nm, power demand is down about 15 percent.”
 
Systems running on Ambarella’s high-performance chips enable significant complexity, but the company seeks to ensure this doesn’t come at the cost of agility.

“Another area that we’re demonstrating is cloud orchestration,” said Amit Badlani, Director of Product Marketing for AI/ML, Ambarella (pictured above). “The focus is on showing how easy it is to distribute AI workloads across a system. Simply by dragging-and-dropping, users can decide where each AI workload should be running—on edge devices, on an on-prem AI box, or in the cloud.”
 
“Users can also overview workloads and distribute them using their AI box, thanks to the compute power of the N1,” he said, adding that additional hardware used to be necessary for such operations on the previous generation of systems. “Our AI agent-based workflow also supports integration with a host of open-source AI tools, such as Openclaw or Diffy, making system setup even easier for those who are used to working with those tools.”
 
However, Ambarella also takes into account that many real-world deployments run on legacy devices that have no edge AI capabilities.
 
“For such systems, flexibility is key,” said Badlani. “Operators have full control over how they orchestrate AI workloads. They have the potential to benefit from the latest AI without the need for ‘rip and replace.’ They can simply move workloads where their system has AI capabilities.”
 
“In general, the aim is to enable more and more operations to run on the edge,” Badlani concluded. “The main reason is to reduce latency to near zero, from 20 to 30 milliseconds when operations run in the cloud.”
 
“One challenge, however, is achieving the highest accuracy in leaner edge AI models. Memory is also limited on the edge,” Badlani said. “Our chips are not just extremely energy-efficient, but also memory efficient. This helps run more models, and models with higher parameter counts, in each camera.”
 

Development philosophy

With the development of the CV7 and N1 chips, Ambarella is making a decisive move toward highly specific AI models as it seeks to be ahead of the curve of other chip designers. This includes running vision-language models directly at the edge, which is the first time possible on Ambarella chips. While this opens new opportunities to camera-makers, it requires strong focus on efficiency.
 
“Most AI models used in security cameras these days are generic video processing models,” Badlani explained. “We’re expecting to see more specific models in the future. One focus area will almost certainly be interpolating video frames more accurately and efficiently. This is important because no edge AI, no matter how advanced, can analyze the full wealth of data if the camera runs on, let’s say, 30fps recording in 4k. Therefore, most edge devices extrapolate based on 10 to 20 randomly selected frames, which they pull into a large-language model.”
 
“The challenge for Ambarella is to ensure the quality of those key frames,” Badlani stated. “With our AISP, we’re seeking to enhance the performance of those models by giving them a cleaner and more relevant input, making them multiple times more accurate.”
 
One of the demos in the Ambarella suite showcased this impressively. AISP-powered images had visibly less motion blur, while artifacts that appeared in streams using traditional processing disappeared.
 
“By raising the quality of image data using our AISP, we effectively enhance the quality of all AI workloads downstream,” Badlani explained. “And used in conjunction with techniques like MoE (Mixture of Experts), downstream AI models can analyze what’s in the frame more efficiently, using a lower parameter count to reach the same accuracy. A model with 8 billion parameters run on the smaller N1 655 chip inside an AI box has the ability to reach the same accuracy as a 20 billion parameter model. This has the potential to reduces energy and memory demand of the whole system.”
 

Cooper platform for AI developers across chips generations

Ambarella’s partner network includes hardware as well as VMS and VSaaS providers with over 20 third-party AI models in its “library,” Badlani said. For partners, Ambarella’s Cooper Developer Platform serves as a comprehensive hardware and software solution for their edge AI systems, providing powerful, safe and secure compute and software capabilities. It enables continuous development across chip generations.
 
“Developers who have created an application for the previous generation of chips, such as the CV5, can adapt them for use on the CV7 or the N1,” Gigot said. “All they need to do is choose the AI and video performance for the application. They do not even need to rewrite the drivers for the edge device’s sensors.”
 
Thanks to continuous technological advancement, Ambarella’s market outlook for the coming year is bullish.
 
“We’re entering an upgrade cycle for AI camera chips, from the CV5 family focused on Computer Vision and traditional CNNs (Convolutional Neural Networks), to the CV7 family adding in support for advanced AI workloads, including transformers, VLMs, and LLMs and enabling reasoning capabilities locally on device . This has the potential to drive progress across the industry,” Gigot said. “Additionally, we see the industry becoming more vertically focused. Most manufacturers are traditionally orientated towards general-purpose security cameras. In the future, we expect that the focus will be more on verticals and their specific needs, for example, retail. Manufacturers are asking themselves, ‘what kind of data and intelligence do retailers need aside from security?’ Their next generation of devices will likely seek to give answers to vertical players.”
 

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