New Xilinx Virtex-6 FPGA Family Designed to Satisfy Insatiable Demand for Higher Bandwidth and Lower Power Systems
Source: Bruce Fienberg, Xilinx, Inc. | Date: 02/16/2009
Xilinx, Inc. (NASDAQ: XLNX) introduced a new generation of its flagship Virtex high-performance field programmable gate array (FPGA) family to enable developers of high-performance, compute-intensive electronic systems to build 'greener' products under tighter design cycles with lower development costs. At up to 50 percent lower power and 20 percent lower cost than previous generations, the new Virtex-6 FPGA Family delivers the right mix of flexibility, hard intellectual property (IP) cores, transceiver capabilities, and development tool support that enables Xilinx customers to meet the demands of markets with evolving standards and stringent performance requirements in the pursuit of higher bandwidth. With today's new generation of Virtex series FPGAs, a broader base of system designers will be able to leverage programmable logic in wireless/wired communications, broad－, and aerospace and defense applications among others.
"Competitive forces are driving infrastructure equipment manufacturers to focus on reducing system costs and operating expenses while next-generation applications across the spectrum of electronic equipment take up more bandwidth," said Semico Research Corp. market analyst Rich Wawrzyniak. "It's a predicament that developers can overcome by designing programmable logic into their systems for meeting heavy-duty computational requirements, while simplifying and lowering the costs of their systems through integration."
In related news, Xilinx also introduced its next-generation, low-cost Spartan-6 family (see separate announcement "New Xilinx Spartan-6 FPGA Family Brings Low-Power, Connectivity and High-Performance to Cost-Sensitive Electronic Systems"). The company's Virtex-6 and Spartan-6 FPGA families are the programmable silicon foundation for targeted design platforms from Xilinx and its third-party network that deliver development methodologies and IP for electronic systems manufacturers who require integrated hardware and software programmability to address the financial, market, and technological challenges of today's economy. Each new family includes development tool and Xilinx Engineering Services support for digital signal processing (DSP), high-speed connectivity, and embedded systems applications.
Built on a 40-nanometer (nm) process using third-generation Xilinx ASMBL architecture, the Virtex-6 FPGA family is supported by a new generation of development tools and a vast library of IP already available for the Virtex-5 FPGA family to ensure productive development and design migration. Providing 15 percent higher performance and 15 percent lower power consumption compared to competitive 40nm FPGA offerings, the new devices operate on a 1.0v core voltage with a 0.9v low-power option. These advances enable system architects to integrate Virtex-6 FPGAs into their designs to enable ‘green' central offices and data centers, which is particularly relevant for the telecommunications industry as it implements the next wave of scaling to support demand for internet video and rich media content.
Virtex-6 FPGA Domain Optimization
The Virtex- 6 FPGA family comprises three domain-optimized FPGA platforms that deliver different feature mixes to best address a variety of customer applications:
Virtex-6 LXT FPGAs – optimized for applications that require high-performance logic, DSP, and serial connectivity with low-power GTX 6.5Gbps serial transceivers
Virtex-6 SXT FPGAs – optimized for applications that require ultra high-performance DSP and serial connectivity with low-power GTX 6.5Gbps serial transceivers
Virtex-6 HXT FPGAs – optimized for communications applications that require the highest-speed serial connectivity with up to 64 GTH serial transceivers supporting up to 11.2Gbps
A combination of advanced silicon technology, innovative circuit design techniques, and architectural enhancements enable Virtex-6 FPGAs to deliver significantly lower power consumption, higher performance, and lower cost than previous-generation Virtex devices and competing FPGA offerings.
"With the Virtex-6 FPGA Family, Xilinx continues to advance our efforts to supply the biggest, fastest, and most user-friendly FPGA Boards for ASIC prototypes," said Mike Dini, President at the DINI Group. "We will set new records for size and speed with boards based on this new generation devices."
Among the high-performance applications for which Virtex-6 devices are ideally suited are:
Wireless Infrastructure – The higher densities and increased performance of Virtex-6 FPGAs, coupled with optimized IP developed by Xilinx and its third-party network, enable advanced algorithms, such as crest factor reduction (CFR) and digital pre-distortion (DPD), that increase power amplifier efficiency by up to 40 percent. This significantly reduces operating expenses significantly, by as much as $18 million for a typical network operator running 10,000 base stations. Such levels of efficiency also lead to a reduction in carbon emissions of over 31,000 tons and are critical to delivering the ‘green' base-stations of the future. With exceptional features and industry-leading speed and power performance, Virtex-6 FPGAs make the ideal platform for next-generation 3GPP-LTE and LTE advanced base station development.
Wired Networking – Increased consumption of digital content is straining existing network bandwidth and accelerating development of next-generation applications, such as 40Gbps/100－Gbps line cards, routers, switches, and high-density data ports for data centers. The Virtex-6 FPGA family includes optimized logic ratios, increased performance for wider internal datapaths, and multi-rate transceivers to deliver higher overall throughput at lower latency. Using the Virtex-6 FPGA family customers can implement an OTU (optical transport unit)-4 framing and enhanced forward error correction (EFEC) solution used in core networks. Optimized logic and transceiver ratios enable developers to implement the 100-Gigabit Ethernet (GE) to OTU-4 framer and critical EFEC using Virtex-6 FPGAs. Developers can replace costly, high-risk ASICs, while improving the flexibility of their proprietary, differentiated algorithms to extend the reach of their optical transport without using repeaters. Providing greater than 40 percent lower system power consumption, the Virtex-6 FPGA implementation can be deployed within existing infrastructure and power budgets, thereby dramatically reducing operating expenses.
Broad－ Equipment – Virtex-6 FPGAs provide a fully programmable, cost-effective solution for meeting current and future broad－ requirements, while enabling differentiation through video quality. High-speed serial transceivers support SD/HD/3G-SDI and embedded audio for all types of broad－ applications. Fully integrated support for 10Gbps Ethernet enables bridging between broad－ and telecomm networks allowing fast access and retrieval of stored video content. Increased memory and DSP ratios enable real-time, uncompressed video processing at HD, 2K, and 4K resolutions. Optimized logic ratios and power management enable advanced H.264 and JPEG2000 encoding, all while reducing power and thermal management requirements for any given performance target.
Aerospace and Defense – Aerospace and defense designers are increasingly dependent upon FPGAs for high computational performance and reconfigurable computing in applications ranging from infrastructure communications to electronic warfare and image processing. Virtex-6 SXT FPGAs provide the industry's highest DSP bandwidth at over 1TMACS, by combining over 2000 advanced DSP slices with optimized ratios of logic, Block RAM, and distributed RAM. This computation bandwidth is augmented by over 450Gbps of serial bandwidth to move data on-chip and off-chip quickly and efficiently. All this computational capability is also fully scalable and optimized to reduce overall system power consumption by over 50 percent compared to previous generation technologies.